?002 fairchild semiconductor corporation RFG60P05E rev. b RFG60P05E 60a, 50v, 0.030 ohm, esd rated, p-channel power mosfet this is a p-channel power mosfet manufactured using the megafet process. this process, which uses feature sizes approaching those of lsi circuits, gives optimum utilization of silicon, resulting in outstanding performance. it was designed for use in applications such as switching regulators, switching converters, motor drivers, and relay drivers. this type can be operated directly from integrated circuits. formerly developmental type ta09835. features 60a, 50v ? ds(on) = 0.030 ? temperature compensating pspice model 2kv esd rated peak current vs pulse width curve uis rating curve 175 o c operating temperature related literature - tb334 ?uidelines for soldering surface mount components to pc boards symbol packaging jedec style to-247 ordering information part number package brand RFG60P05E to-247 RFG60P05E note: when ordering, use the entire part number. d g s drain (bottom side metal) source drain gate data sheet january 2002 .com .com .com .com 4 .com u datasheet
?002 fairchild semiconductor corporation RFG60P05E rev. b absolute maximum ratings t c = 25 o c, unless otherwise speci?d RFG60P05E units drain to source breakdown voltage (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v ds -50 v drain to gate voltage (r gs = 20k ? ) (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v dgr -50 v gate to source voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v gs 20 v continuous drain current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i d pulsed drain current (note 3) (figure 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .i dm 60 refer to peak current curve a power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p d derate above 25 o c. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215 1.43 w w/ o c single pulse avalanche rating (figure 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e as refer to uis curve w/ o c electrostatic discharge rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e sd mil-std-883, category b(2) 2kv operating and storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .t j, t stg -55 to 175 o c maximum temperature for soldering leads at 0.063in (1.6mm) from case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .t l package body for 10s, see techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t pkg 300 260 o c o c caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not implied. note: 1. t j = 25 o c to 150 o c. electrical speci?ations t c = 25 o c, unless otherwise speci?d parameter symbol test conditions min typ max units drain to source breakdown voltage bv dss i d = 250 a, v gs = 0v -50 - - v gate threshold voltage v gs(th) v gs = v ds , i d = 250 a -2--4v zero gate voltage drain current i dss v ds = -50v, v gs = 0v - - -1 a v ds = 0.8 x rated bv dss , t c = 150 o c - - -25 a gate to source leakage current i gss v gs = 20v - - 100 na drain to source on resistance (note 2) r ds(on) i d = 60a, v gs = -10v (figure 9) - - 0.030 ? turn-on time t (on) v dd = -25v, i d = 30a, r l = 0.83 ? , v gs = -10v, r gs = 2.5 ? (figure 13) - - 125 ns turn-on delay time t d(on) -20- ns rise time t r -60- ns turn-off delay time t d(off) -65- ns fall time t f -20- ns turn-off time t (off) - - 125 ns total gate charge q g(tot) v gs = 0v to -20v v dd = -40v, i d = 60a, r l = 0.67 ? i g(ref) = -4ma - - 450 nc gate charge at 10v q g(-10) v gs = 0v to -10v - - 225 nc threshold gate charge q g(th) v gs = 0v to -2v - - 15 nc input capacitance c iss v ds = -25v, v gs = 0v, f = 1mhz (figure 12) - 7200 - pf output capacitance c oss - 1700 - pf reverse transfer capacitance c rss - 325 - pf thermal resistance, junction to case r jc - - 0.70 o c/w thermal resistance, junction to ambient r ja --30 o c/w source to drain diode speci?ations parameter symbol test conditions min typ max units source to drain diode voltage (note 2) v sd i sd = -60a - - -1.75 v diode reverse recovery time t rr i sd = -60a, di sd /dt = 100a/ s - - 200 ns note: 2. pulse test: pulse width 300 s maximum, duty cycle 2%. 3. repetitive rating: pulse width limited by maximum junction temperature. see transient thermal impedance curve (figure 3). RFG60P05E .com .com .com .com .com 4 .com u datasheet
?002 fairchild semiconductor corporation RFG60P05E rev. b typical performance curves unless otherwise speci?d figure 1. normalized power dissipation vs case temperature figure 2. maximum continuous drain current vs case temperature figure 3. normalized maximum transient thermal impedance figure 4. forward bias safe operating area figure 5. peak current capability t c , case temperature ( o c) power dissipation multiplier 0 0 25 50 75 100 175 0.2 0.4 0.6 0.8 1.0 1.2 125 150 -50 -40 -30 -20 -10 0 25 50 75 100 125 150 175 i d , drain current (a) t c , case temperature ( o c) -60 -70 2 1 0.1 0.01 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 thermal impedance z jc , normalized transient single pulse 0.01 0.02 0.05 0.1 0.2 0.5 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z jc x r jc + t c p dm t 1 t 2 t, rectangular pulse duration (s) -500 -100 -10 -1 -1 -10 -100 v ds , drain to source voltage (v) i d , drain current (a) v dss max = -50v operation in this area may be limited by r ds(on) 1ms 10ms 100ms dc 100ms t c = 25 o c, t j = max rated 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 -100 -500 t, pulse width (s) i dm , peak current (a) -50 for temperatures above 25 o c derate peak current capability as follows: i i 25 175 t c 150 --------------------- ?? ?? ?? = transconductance may limit current in this region v gs = -10v t c = 25 o c RFG60P05E .com .com .com .com .com 4 .com u datasheet
?002 fairchild semiconductor corporation RFG60P05E rev. b note: refer to fairchild application notes an9321 and an9322. figure 6. unclamped inductive switching capability figure 7. saturation characteristics figure 8. transfer characteristics figure 9. normalized drain to source on resistance vs junction temperature figure 10. normalized gate threshold voltage vs junction temperature figure 11. normalized drain to source breakdown voltage vs junction temperature typical performance curves unless otherwise speci?d (continued) -200 -100 -10 0.01 0.1 1 10 t av , time in avalanche (ms) i as , avalanche current (a) if r = 0 t av = (l) (i as ) / (1.3rated bv dss - v dd ) if r 0 t av = (l/r) ln [(i as *r) / (1.3 rated bv dss - v dd ) + 1] starting t j = 150 o c starting t j = 25 o c 0 0-2 -4 -6 -8 i d , drain current (a) v ds , drain to source voltage (v) v gs = -8v v gs = -7v v gs = -10v -40 -80 -120 -160 v gs = -20v v gs = -6v v gs = -5v v gs = -4.5v pulse duration = 80 s t c = 25 o c duty cycle = 0.5% max 0 -2-4-6-8-10 v gs , gate to source voltage (v) i ds(on) , drain to source current (a) 0 175 o c 25 o c -40 -80 -160 -120 pulse durationm = 80 s duty cycle = 0.5% max -55 o c v dd = -15v 2 1.5 1 0.5 0 -80 -40 0 40 80 120 160 200 t j , junction temperature ( o c) normalized drain to source pulse duration = 80 s v gs = -10v, i d = 60a on resistance duty cycle = 0.5% max 2 1.5 1 0.5 0 -80 -40 0 40 80 160 120 200 threshold voltage t j , junction temperature ( o c) normalized gate v gs = v ds , i d = 250 a 2 1.5 1 0.5 0 -80 -40 0 40 80 120 160 200 normalized drain to source breakdown voltage t j , junction temperature ( o c) i d = 250 a RFG60P05E .com .com .com .com .com 4 .com u datasheet
?002 fairchild semiconductor corporation RFG60P05E rev. b figure 12. capacitance vs drain to source voltage note: refer to fairchild application notes an7254 and an7260. figure 13. normalized switching waveforms for constant gate current test circuits and waveforms figure 14. unclamped energy test circuit figure 15. unclamped energy waveforms figure 16. switching time test circuit figure 17. resistive switching waveforms typical performance curves unless otherwise speci?d (continued) c iss c oss c rss 6000 4000 2000 0 0 -10 -15 -20 -25 c, capacitance (pf) v ds , drain to source voltage (v) 8000 -5 v gs = 0v, f = 1mhz c iss = c gs + c gd c rss = c gd c oss c ds + c gs -50 -37.5 -25 -12.5 0 -10 -7.5 -5 -2.5 0 v dd = bv dss v dd = bv dss v ds , drain to source voltage (v) v gs , gate to source voltage (v) 20 i g ref () i g act () ------------------------ - t, time ( s) 80 i g ref () i g act () ------------------------ - r l = 0.83 ? i g(ref) = 4ma v gs = -10v 0.75 bv dss 0.50 bv dss 0.25 bv dss 0.75 bv dss 0.50 bv dss 0.25 bv dss t p 0.01 ? l i as + - v ds v dd r g dut vary t p to obtain required peak i as 0v v gs v dd v ds bv dss t p i as t av 0 v gs r l r gs dut + - v dd v ds v gs t d(on) t r 90% 10% v ds 90% t f t d(off) t off 90% 50% 50% 10% pulse width v gs t on 10% 0 0 RFG60P05E .com .com .com .com .com 4 .com u datasheet
?002 fairchild semiconductor corporation RFG60P05E rev. b figure 18. gate charge test circuit figure 19. gate charge waveforms test circuits and waveforms (continued) r l v gs + - v ds v dd dut i g(ref) v dd q g(th) v gs = -2v q g(-10) v gs = -10v q g(tot) v gs = -20v v ds -v gs i g(ref) 0 0 RFG60P05E .com .com .com .com .com 4 .com u datasheet
?002 fairchild semiconductor corporation RFG60P05E rev. b pspice electrical model .subckt RFG60P05E 2 1 3; rev 9/20/94 ca 12 8 1.01e-8 cb 15 14 1.05e-8 cin 6 8 6.9e-9 dbody 5 7 dbdmod dbreak 7 11 dbkmod dplcap 10 6 dplcapmod ebreak 5 11 17 18 -76.35 eds 14 8 5 8 1 egs 13 8 6 8 1 esg 5 10 8 6 1 evto 20 6 8 18 1 it 8 17 1 ldrain 2 5 1e-9 lgate 1 9 7.9e-9 lsource 3 7 4.18e-9 mos1 16 6 8 8 mosmod m = 0.99 mos2 16 21 8 8 mosmod m = 0.01 rbreak 17 18 rbkmod 1 rdrain 5 16 rdsmod 12.83e-3 rgate 9 20 1.5 rin 6 8 1e9 rsource 8 7 rdsmod 3.25e-3 rvto 18 19 rvtomod 1 s1a 6 12 13 8 s1amod s1b 13 12 13 8 s1bmod s2a 6 15 14 13 s2amod s2b 13 15 14 13 s2bmod vbat 8 19 dc 1 vto 21 6 -0.83 .model dbdmod d (is = 1.24e-12 rs = 4.72e-3 trs1 = 1.43e-3 trs2 = -4.91e-7 cjo = 6.98e-9 tt = 1.5e-7) .model dbkmod d (rs = 1.11e-1 trs1 = 1.34e-3 trs2 = 4.46e-12) .model dplcapmod d (cjo = 15e-10 is = 1e-30 n = 10) .model mosmod pmos (vto = -3.71 kp = 31.5 is = 1e-30 n = 10 tox = 1 l = 1u w = 1u) .model rbkmod res (tc1 = 9.42e-4 tc2 = 0) .model rdsmod res (tc1 = 5.85e-3 tc2 = 7.69e-6) .model rvtomod res (tc1 = -3.39e-3 tc2 = 1.07e-6) .model s1amod vswitch (ron = 1e-5 roff = 0.1 von = 4.6 voff = 2.6) .model s1bmod vswitch (ron = 1e-5 roff = 0.1 von = 2.6 voff = 4.6) .model s2amod vswitch (ron = 1e-5 roff = 0.1 von = 1.16 voff = -3.84) .model s2bmod vswitch (ron = 1e-5 roff = 0.1 von = -3.84 voff = 1.16) .ends for further discussion of the pspice model, consult a new pspice sub-circuit for the power mosfet featuring global temperature options ; written by william j. hepp and c. frank wheatley. mos1 10 dplcap rdrain dbreak ldrain drain source lsource dbody rbreak rvto vbat + - 19 it rsource ebreak mos2 eds egs rin cin vto esg s1a s2a s2b s1b cb ca evto rgate gate lgate 5 2 18 17 7 11 21 8 6 16 20 9 1 12 15 14 13 13 8 14 13 + - + - + - + - + - + - 3 8 6 17 18 5 8 6 8 18 8 RFG60P05E .com .com .com .com .com 4 .com u datasheet
disclaimer fairchild semiconductor reserves the right to make changes without further notice t o any products herein t o improve reliability , function or design. fairchild does not assume any liability arising out of the applica tion or use of any product or circuit described herein; neither does it convey any license under its p a tent rights, nor the rights of others. trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production optologic? optoplanar? pacman? pop? power247? powertrench qfet? qs? qt optoelectronics? quiet series? silent switcher fast fastr? frfet? globaloptoisolator? gto? hisec? isoplanar? littlefet? microfet? micropak? microwire? rev. h4 a acex? bottomless? coolfet? crossvolt ? densetrench? dome? ecospark? e 2 cmos tm ensigna tm fact? fact quiet series? smart start? star*power? stealth? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic? trutranslation? uhc? ultrafet a a a star*power is used under license vcx? .com .com .com .com 4 .com u datasheet
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